HAPS RISC-V Workshop

2019年09月03日

Prototype RISC-V based designs on HAPS

Workshop Overview:

RISC-V CPU core becoming more and more popular in the industry and quickly building RISC-V based FPGA platform will accelerate the software validation. Synopsys HAPS prototyping platform is industry leading system solution, includes HAPS High-performance ASIC Prototyping System and ProtoCompiler the auto design partition and visual debug tool. Running RISC-V CPU core on HAPS gives highest possible performance prototype that helps to shorten the time to market of your product.

 

SiFive Speaker: David Hu, SiFive China, senior FAE Manager

Topic: RISC-V Overview, Architecture, RISC-V Software Stack, Hardware Generation

 

Date: Sep.3

Venue: 深圳市南山区科技中二路深圳软件园1期4栋6楼

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